基于FPGA的匹配滤波接收机实现技术研究  

Research on implementation of matched filter receiver based on FPGA

作　　者：张爱民[1] 王星全[1] 

机构地区：[1]总参谋部通信训练基地,宣化075100

出　　处：《信息技术》2012年第4期124-125,128,共3页Information Technology

摘　　要：高效数字匹配滤波器设计是数字接收机中提高信噪比改善系统信号处理性能的一项关键技术。数字匹配滤波器在通信和雷达接收机中应用广泛,文中分析了匹配滤波接收机的基本原理,介绍了QPSK信号匹配滤波接收机的FPGA实现过程,并给出了基于Xilinx ISE 8.2i的Test Bench Waveform仿真结果。Efficient digital matched filter in digital receiver is designed to improve signal-to-noise ratio improve system signal processing properties of a key technology.Digital matched filter has more and more application in communication and radar receiver.The paper analyzed the basic principle of matched filter,implementation on matched filter receiver of QPSK signal based on FPGA has been introduced,and the simulation results based on the Test Bench ISE 8.2i Waveform is presented.

关 键 词：匹配滤波器 接收机 FPGA 

分 类 号：TN919[电子电信—通信与信息系统]