锁相环设计中的功率分配与分频器配置方法  

Methods on Power Distribution and Configuration of Frequency Divider in Design of Phase-locked Loop

作　　者：杨继松[1] 韩喆[1] 邢钧[2] 宁永海[1] 

机构地区：[1]河南科技大学电子信息工程学院,河南洛阳471003 [2]国家广播电视产品质量监督检验中心,北京100015

出　　处：《电视技术》2012年第13期31-34,共4页Video Engineering

摘　　要：针对锁相环频率合成器工程设计中的问题,对锁相环参考频率输入端的馈电电路提出改进措施,增强了锁相环参考频率信号的输入功率,为提高相位噪声性能创造了有利条件。对传统的VCO输出T型电阻功率分配网络进行改进,减小了因功率过多分配给锁相环反馈支路所造成的损失,最大限度地把VCO的功率分配给端口负载。并给出了锁相环频率合成器在多频点和单频点信号输出时分频器的通用配置方法。实验验证该理论分析和设计方法的正确性。According to the problems existed in the design of PLL frequency synthesizer, the improvements on input feedback circuit of PLL reference frequency is presented,which enhances the input power of PLL reference frequency and create favorable conditions for improved phase noise performance at the same time. The improvement to traditional VCO output T-type resistance power distribution network reduces the power losses caused by redundant power distribution to the PLL feedback circuit, and assigns VCO output power to the load at maximum limit. A common configuration method of frequency divider is provided that can be used both in multi-frequency and single-frequency signal output of PLL frequency synthesizer. The correctness of theoreti- cal analysis and design method are verified by experiments.

关 键 词：频率合成 锁相环 功率分配 阻抗匹配 分频器配置 

分 类 号：TN742[电子电信—电路与系统]