基于FPGA的BLVDS总线设计  

Design of BLVDS Bus Based on FPGA

作　　者：张洪亮[1] 

机构地区：[1]中国西南电子技术研究所,成都610036

出　　处：《电讯技术》2012年第6期1022-1026,共5页Telecommunication Engineering

摘　　要：针对现有的航空总线系统结构复杂、传输速率低、电磁兼容性差等问题,提出了一种基于FPGA的总线型低压差分信号(BLVDS)总线解决方案。介绍了BLVDS的总线结构,对BLVDS的通信方式和基于FPGA使用硬件描述语言实现BLVDS总线通信的方法进行了深入研究。同时,分析了信号传输质量,在工程中验证了其高速率和高可靠的总线传输特性,为新一代航空高速总线系统提供了参考。To solve problems of avionics system based on electrical bus, such as complex structure, low trans- mission rate, bad electromagnetic compatibility, a kind of Bus- Low Voltage Differential Signaling（BLVDS） based on FPGA is proposed. The structure of BLVDS bus is introduced and related key technologies are investi- gated including BLVDS communications and the method for BLVDS communications based on FPGA by hardware description language. At the same time, the signal transmission quality is analysed, the high speed and high re- liable bus transmission characteristics are verified in application of project, which provides important referencefor new- style avionics high speed bus system.

关 键 词：航空总线 数据传输 总线型低压差分信号 硬件描述语言 

分 类 号：V243[航空宇航科学与技术—飞行器设计] TP336[自动化与计算机技术—计算机系统结构]