基于FPGA的压制性干扰源的研究与设计  

Research and design of the signal source of blanket jamming based on the FPGA

作　　者：苗新法[1] 张小磊[1] 

机构地区：[1]兰州交通大学电子与信息工程学院,甘肃兰州730070

出　　处：《电子技术应用》2012年第7期48-50,共3页Application of Electronic Technique

摘　　要：提出了一种新型压制系统的设计方案,基于现场可编程门阵列作主控,通过直接数字频率合成技术实现中频信号,通过混频的方式进行频谱搬移。系统具有宽带阻塞式、瞄准式和扫频式三种压制方式,且压制带宽和中心频率步进可调。实测结果表明,系统设计符合要求,能够满足实际需要。A new design is put forward in this paper. Field Programmed Gate Array is the main controller in this design. DDS technology is used to generate IF signal. The IF signal is mixed with LO to realize spectrum shifting. This system has three blanket ways, and its bandwidth and middle frequency can be step modulated. The test result shows this system is effective and can be used in many fields.

关 键 词：压制式干扰 现场可编程门阵列 直接数字频率合成 噪声调频 

分 类 号：TN97[电子电信—信号与信息处理]