NIOS II环境下可复用IIRcore的设计与应用  

The Design and Application of Reuseable IIRcore

作　　者：邓永海[1] 

机构地区：[1]宜宾职业技术学院,四川宜宾644003

出　　处：《科技通报》2012年第6期16-18,共3页Bulletin of Science and Technology

基　　金：宜宾市科技局资助项目(200804004)

摘　　要：提出了一种采用FPGA实现定点IIR滤波器的通用设计。其特点在于基本二阶节可在多个滤波器和滤波器各节之间的反复重用,一个嵌入式阵列乘法器与加法器又在基本二阶节内反复重用。通过NIOS II CPU的控制,滤波器可配置成各种类型的IIR滤波器,二阶节的计算顺序可配置成的并联或串联,还可自由地控制二阶节的使用或修改其系数。An usual structure of IIR filter which can be implemented on FPGA is proposed in this paper, its characters is that base 2-order section filter can be reused among filters or sections, an embedded multiplier and an adder are reused in the base 2-order section. Filters can be configured to any kind of IIR factors,sections＇ sequence can be parallel or serial,sections can be decided to be used or not be used and sections＇ factors can be modified freely, all these can be done by NIOS II CPU.

关 键 词：FPGA IIR NIOS II 

分 类 号：TP332[自动化与计算机技术—计算机系统结构]