无源超高频RFID标签芯片的超低功耗数字基带电路的设计与实现  

Design and implementation of an ultra low power baseband for UHF RFID tags

作　　者：徐凯[1] 毛陆虹[1] 王峥[1] 王强[1] 陈力颖[1] 谢生[1] 张世林[1] 

机构地区：[1]天津大学电子信息工程学院,天津300072

出　　处：《高技术通讯》2012年第6期663-668,共6页Chinese High Technology Letters

基　　金：863计划（2008AA04A102）和国家自然科学基金（61072010）资助项目.

摘　　要：依据EPCC1G2协议设计了一种用于无源UHF射频识别RFID标签芯片的数字基带电路，在完成协议规定功能的前提下实现了系统的低功耗。通过引入系统时钟规划、状态优化编码、全局钟控、异步计数器、门级功耗优化与操作数隔离等多种低功耗技术，设计最终功耗为13．81μW。为更好地实现系统的防冲突，采用了一种基于振荡器采样的真实随机数产生器，整个随机数产生电路功耗控制在21μW以内。设计采用Chartered0．18μm 艺实现，数字电路面积为482μm×480μm，芯片测试结果与仿真结果基本符合。A digital baseband-processor for UHF RFID tags was designed and implemented in this study based on the EPCTM class-1 generation-2 （C1G2） UHF RFID protocol to realize the digital system＇s ultra low power consump- tion under the prerequisite of ensuring the protocol＇ s functions. The low-power consumption techniques, such as system clock programming, state optimization coding, global gating asynchronous counter, gate-level power optimi- zation, operand isolation, were introduced into the design and the final power consumption of 13.8μW of the base- band was achieved. In order to achieve the goal of Anti-Collision, an oscillator-based random number generator was designed, and its power was controlled to less than 21μW. The chip was fabricated in the Chartered 0.181μm stand- ard CMOS process. The die area of the baseband was only 4821μm ×4801μm. The test results of the chip were basi- cally consistent with the simulation results.

关 键 词：超高频RFID 标签芯片 数字基带电路 低功耗 随机数产生器 

分 类 号：TN915.04[电子电信—通信与信息系统]