可重构多核片上系统体系结构综述  

Reconfigurable multiprocessor system-on-chip:survey of architecture

作　　者：唐柳[1,2] 黄樟钦[1] 侯义斌[1] 方凤才[2] 

机构地区：[1]北京工业大学嵌入式软件与系统研究所,北京100124 [2]广西师范学院,南宁530023

出　　处：《计算机工程与应用》2012年第20期39-45,共7页Computer Engineering and Applications

基　　金：北京市科委重点项目(No.025000546611003);211高层次人才培养项目(No.025000543111502)

摘　　要：可重构片上多核系统利用不同粒度、不同耦合度的可重构资源,充分开发资源的并行性,兼顾硬件计算的高性能及软件实现的灵活性,且复用特性使其具备开发设计成本降低、产品面市时间缩短的优势。介绍可重构计算系统概念及其分类,从系统级层面回顾可重构多核片上系统体系结构的研究进展,讨论未来的研究趋势及需要关注的关键问题。Reconfigurable multiprocessor system on chip combines the high performance of hardware with the flexibility of software. It effectively and efficiently exploits all sorts of parallelism by involving different granularity and differently coupled reconfigurable resources. Simultaneously, it reduces the design and development costs and shortens the time to market. In this paper, the concept and major classes are introduced. Subsequently, the hardware architecture of reconfigurable multiprocessor system on chip at the system level is reviewed. The future research trends and key problems are discussed.

关 键 词：可重构 多核片上系统 体系结构 可信性 

分 类 号：TP302.1[自动化与计算机技术—计算机系统结构]