基于FPGA的IMA-ADPCM编/解码器的设计与实现  

FPGA-based IMA-ADPCM codec research and design

作　　者：王小军[1] 赵嘎[1] 舒平平[1] 杨军[1] 

机构地区：[1]云南大学信息学院,云南昆明650091

出　　处：《云南大学学报（自然科学版）》2012年第4期415-419,共5页Journal of Yunnan University(Natural Sciences Edition)

基　　金：云南大学2010年度研究生优秀教材建设基金项目资助

摘　　要：详细研究分析了IMA-ADPCM算法原理及其实现过程,利用FPGA资源消耗低、灵活性强、速度快、性价比突出等优势,使用VerilogHDL硬件描述语言设计并实现了IMA-ADPCM编/解码器.该编/解码器通过了Modelsim仿真测试和CycloneⅢ、StartixⅢ、Spartan 6以及Virtex 5等不同系列芯片的下载验证,确保编/解码器的正确性和稳定性.整个设计充分利用了FPGA芯片的资源、硬件结构简单、可靠性高,具有良好的应用前景.In this paper, we first made a detailed analysis of the principle of IMA -ADPCM algorithm theory and its implementation process. We mainly designed and realized the IMA - ADPCM - based encoder/decoder by incorporating low resource consumption, flexibility, high GA,where VerilogHDL, a hardware description languag speed and outstanding performance - price ratio of FPGA, was adopted. By the simulation test of Modelsim and download test of different series of chips, such as Cyclone Ⅲ, Startix m, Spartan 6 and Virtex 5, the correctness and stability of the eneoder/deeoder was ensured. The whole design makes full use of the characteristics of FPGA, such as simple structures of resource and hardware and the high reliability, and thus has good prospect of applications.

关 键 词：IMA-ADPCM FPGA PCM 编码 解码 

分 类 号：TP309.7[自动化与计算机技术—计算机系统结构]