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机构地区:[1]中北大学电子测试技术国家重点实验室,山西太原030051
出 处:《探测与控制学报》2012年第3期67-70,共4页Journal of Detection & Control
基 金:国家自然科学基金项目资助(50535030)
摘 要:针对传统多路并行信号源存在幅值不灵活可调且成本高的缺点,设计了基于FPGA和DDS技术相结合的程控调幅多路并行信号源。该信号源在FPGA内实现DDS的资源优化,利用DDS原理配合FPGA无缝式内部访问IP Core方式实现频率可调;利用FPGA内部程序设计对归一化的数字量进行调制及转换实现幅值可调。实验表明:该信号源可并行输出32路高精度信号,输出信号的频率、幅度、波形等均可由用户按实际需求通过上位机软件设定。直流信号的精度达到满量程的0.1%,输出的矩形波边沿时间小于1μs。Aiming at the shortcomings of no adjustable amplitude and high expense of traditional multi-touting signal source,an adjustable parallel signal source with 32 channels based on FPGA and DDS technology was de signed. Resource optimization of DDS was completed inside FPGA. Based on the DDS and FPGA seamless accessing IP core,the frequency adjusting was obtained by inside program of FPGA, and the amplitude adjusting was fulfilled by normalized amount modulation and transformation. Experimental results showed that the signal source could output 32 channels dc signals which was 0. 1 % of the full range, and the edge time of output square wave was less than 1 μs.
分 类 号:TN791[电子电信—电路与系统]
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