基于模拟的故障注入技术在高可靠处理器的应用  

The Application of Simulation-Based Fault Injection on High Reliable Processor

作　　者：魏方巍[1] 刘海南[1] 黑勇[1] 

机构地区：[1]中国科学院微电子研究所,北京100029

出　　处：《微电子学与计算机》2012年第8期70-73,共4页Microelectronics & Computer

基　　金：国家重大科技专项(2009zx02306-003)"高可靠库单元与产品设计"

摘　　要：高可靠处理器在设计过程中,需要在不同阶段采用适当的故障注入技术,对其可靠性进行验证和评估.以LEON3高可靠处理器中的TMR(Triple Module Redundancy)flip-flop为例,使用基于模拟的故障注入技术对高可靠处理器进行故障注入.通过实验表明,采用此类故障注入技术,可以在设计前期对加固设计的可靠性进行快速验证,缩短开发周期,降低验证成本.During the design process of high reliable processor, appropriate fault injection technologies should be adopted at different stages to analysis and evaluation the reliability of the processor. On the basis of LEON3 high reliable processor, the simulation-based fault injection has been used to inject faults into Triple Module Redundancy flip-flops. Experiments show that the simulation-based fault injection can be used in the early design stage of high reliable processor to shorten the development cycle and reduce the cost of validation.

关 键 词：高可靠性设计 LEON3 TMR 故障注入 

分 类 号：N945.17[自然科学总论—系统科学]