一种新的基于FPGA的雷达视频压缩方法  

New Radar Video Compression Method Based on FPGA

作　　者：张艳艳[1] 陈苏婷[1] 

机构地区：[1]南京信息工程大学电子与信息工程学院,江苏南京210044

出　　处：《电视技术》2012年第17期63-66,共4页Video Engineering

基　　金：中国博士后科学基金(2011M500940)

摘　　要：针对目前雷达视频分辨力较高、目标信息多包含在高频细节部分的特点,设计并实现了一种基于FPGA的高分辨力雷达视频压缩方案。该方案分别对DCT、量化、编码等核心处理模块分别进行优化设计,以适应雷达视频压缩的需求。在1片StratixⅣGX EP4SGX230KF40C4芯片上进行验证,结果表明,该设计方案资源占用率低,压缩后图像质量较好,对于1 600×1 200分辨力的视频处理速度可达50 f/s(帧/秒)以上,满足高分辨力雷达视频实时压缩的要求。According to the characteristics of radar video image that the resolutian is high and the infonmation of the aim target is alvays included in high frequenly details a high resolution radar video image compression scheme is proposed and implemented on FPGA. The key modules as DCT,quantification,and encoder are designed respectively. The scheme is accomplished in a Stratix 1VGX EP4SGX230KF40C4 chip. The experimental results show that the utilization is low and the image quality after compressed is good with the processing speed is higher than 50 f/s for 1 600 × 1 200 resolution video image which meets the requirements of high resolution radar video real-time compression.

关 键 词：高分辨力雷达 视频压缩 FPGA 实时性 

分 类 号：TN919.8[电子电信—通信与信息系统]