基于ΣΔ调制的Tetra基带前端设计  

Design on Baseband Receiver Front-end of Tetra System Based on ΣΔ Modulation

作　　者：李文龙[1] 聂紫晨[2] 许金勇[3] 聂景楠[1] 

机构地区：[1]解放军理工大学,江苏南京210007 [2]西安电子科技大学,陕西西安710126 [3]总参谋部第63研究所,江苏南京210007

出　　处：《无线电通信技术》2012年第4期21-23,31,共4页Radio Communications Technology

基　　金：国家自然科学基金项目(61102092)

摘　　要：抗混叠滤波和模数转换器性能严重影响到后续接收机的数字处理。高分辨率A/D转换虽然可改善信号/量化噪声比,但也要求抗混叠滤波器有更低阻带衰减,致使其实现复杂、成本增加。在Tetra系统基带设计中,采用过采样ΣΔ调制可平衡高比特A/D转换与简单抗混叠滤波两者矛盾的要求。在分析ΣΔ调制的噪声整形基础上,针对Tetra系统要求,完成过采样3阶ΣΔ调制器及1/16降速抽取滤波器设计,MATLAB仿真验证了设计的正确和有效性,给出了相关的设计结果。The performance of anti-aliasing filters and analog-to-digital converters severely impacts on follow-up digital signal processing. It is known that the higher ratio of signal-to-quantization noise can be achieved with more bits of an A/D converter,but the lower stop-band attenuation for the anti-aliasing filter is also required. In this paper, an oversampling ∑A modulator is used in a baseband receiver design of Tetra system for providing a tradeoff solution. The mechanisms of quantization noise shaping and removal of a ∑A modulator are analyzed. A three-order ∑A modulator and a low-pass filter with 1/16 decimation are designed,and MATLAB-based simulation is carried out for the design verification and relevant results are demonstrated.

关 键 词：TETRA 抗混叠滤波器 ΣΔ调制器 抽取滤波器 

分 类 号：TN92[电子电信—通信与信息系统]