V波段CMOS注入锁相二分频器设计  

Design of V-band CMOS injection-locked divide-by-2 frequency divider

作　　者：杜泽保[1] 杨浩[1] 张海英[1] 

机构地区：[1]中国科学院微电子研究所射频集成电路研究室,北京100029

出　　处：《中国科学院研究生院学报》2012年第5期681-685,共5页Journal of the Graduate School of the Chinese Academy of Sciences

基　　金：国家国际科技合作专项(2009DFA12130)资助

摘　　要：基于IBM 90 nm RF CMOS工艺,设计了49.8～55.8 GHz锁相范围的毫米波注入锁相分频器。对电感、共面波导和微带线进行对比.将Q值较高的电感用于振荡器部分以得到较好的相位噪声,将共面波导用于输入匹配部分以得到较宽的输入匹配,注入节点处感性元件采用共面波导以减小版图面积.对振荡器和输入晶体管的偏置电压进行优化,得到较高的注入效率以提高锁相范围.Based on the IBM 90 nm RF CMOS technique,an injection-locked millimeter-wave frequency divider with a locking range from 49.8-55.8 GHz was designed.Inductor,co-planner waveguide（CPW）,and microstrip have been compared.Inductor with higher quality factor was used in Oscillator core to improve phase noise.CPW was used in input match network to get broadband match,and it was also used in injection net to reduce layout area.Bias voltage of oscillator core and input transistor was optimized to improve the locking range.

关 键 词：CMOS 毫米波 注入锁相 共面波导 

分 类 号：TN929.11[电子电信—通信与信息系统]