一种基于FPGA的E1数字传输分析仪成解帧实现方法  

A method of framer and de-framer implementation based on FPGA in E1 digital transmission analyzer

作　　者：耿立华 李占勇 王硕 李钢 

机构地区：[1]北京天航信民航通信网络发展有限公司

出　　处：《微计算机信息》2012年第9期212-213,223,共3页Control & Automation

摘　　要：本文提出了一种基于FPGA的E1数字传输分析仪成解帧的实现方法,分析了E1帧结构,设计了基于FPGA的E1基本帧、复帧同步检测和CRC-4算法电路,完成了E1成解帧器的RTL(Register Transfer Level)级描述,利用ModelSim软件进行了仿真验证,并在飓风系列(Cyclone)FPGA上进行了硬件实现和工业验证,结果表明该方法可实现对各种E1设备帧结构、帧错误和帧告警的检测统计,并通过了工业和信息化部通信计量中心的校准。A method of E1 framer and de-framer implementation based on FPGA in digital transmission analyzer is proposed in the thesis.The structure of E1 frame is analyzed at first,then,the circuits of the E1 frame and multi-frame alignment detection and the arithmetic of CRC-4 based on FPGA are designed,and then,the RTL（Register Transfer Level） description of E1 framer and de framer is completed,at last,the design which is verified with the ModelSim software is implemented with the Cyclone FPGA.The result indicates that the method can implement various analyses including of the structure of E1 frames,frame errors and frame alarms.Finally,the analyzer based on the method is calibrated by telecommunication metrology center of MIIT.

关 键 词：E1 FPGA 成解帧 数字传输分析仪 

分 类 号：TP23[自动化与计算机技术—检测技术与自动化装置] TN914[自动化与计算机技术—控制科学与工程]