一种低功耗Sigma-Delta调制器的设计  

Design of a low-power sigma-delta modulator

作　　者：王亮[1] 杨骁[1] 齐骋[1] 凌朝东[1] 谢应辉[2] 

机构地区：[1]华侨大学信息科学与工程学院,福建厦门361021 [2]北京微电子技术研究所,北京100076

出　　处：《微型机与应用》2012年第18期27-29,34,共4页Microcomputer & Its Applications

基　　金：福建省自然科学基金(2010J05135);中央高校基本科研业务专项资金(JB-ZR1128)

摘　　要：采用改进的单环二阶2bit调制器架构和低功耗AB类放大器电路,实现了一种应用于无线收发机系统中的低功耗Sigma-Delta调制器。利用Matlab/Simulink进行了建模仿真,优化调制器系数,并采用TSMC0.18μmCMOS工艺进行了电路设计。电路仿真结果表明,在采样频率为1.2288MHz、过采样率为64时,调制器的信号噪声谐波失真比达到77.0dB,功耗为1.18mW,具有低功耗特点。A low-power Sigma-Delta modulator applied to wireless transceiver system is implemented by adopting the improved single-loop second-order 2-bit structure and the low-power class-AB amplifier. System model of the modulator is built and simu- lated by Matlab/Simulink, and the coefficients are optimized. The circuit is designed in TSMC 0.18 μm CMOS process. Simulation results show that the modulator can achieve a SNDR of 77 dB at the sample frequency of 1.228 8 MHz and the over-sampling ratio of 64, and the power consumption is 1.18 mW. The modulator achieves a good performance on low power.

关 键 词：DELTA-SIGMA调制器 低功耗 全差分运算放大器 

分 类 号：TN432[电子电信—微电子学与固体电子学]