基于FPGA的CCD光积分时间大范围实时自调节系统  

Real-Time Auto-Adjust System of Large-Scale CCD Light Integration Time Based on FPGA

作　　者：胡开付[1] 王双保[1] 

机构地区：[1]华中科技大学光电子科学与工程学院,湖北武汉430074

出　　处：《大气与环境光学学报》2012年第5期376-384,共9页Journal of Atmospheric and Environmental Optics

基　　金：中央高校基本科研业务费(HUST:2011TS119);国家高技术研究发展计划(863计划)(2011AA03A106)资助

摘　　要：为了提高系统的自适应性、探测能力及测量精度,常常需要系统能根据待测光照强度自动实时大范围地调节电荷耦合器件(CCD)光积分时间。在分析了TCD1304AP型线阵CCD的特性、工作过程与驱动时序的基础上,设计了基于现场可编程逻辑门阵列(FPGA)控制的CCD光积分时间大范围实时自适应调节系统。研究分析了光积分时间计算算法,选用EP1C20F400C8作为硬件载体,使用Verilog语言对算法及CCD驱动时序进行了硬件描述;采用QuartusⅡ软件对设计进行编译、综合,并用Modelsim进行了前后仿真;用自然光与LED光源对整个设计进行了实际测试。测试结果表明系统光积分时间调节范围在10μs～10 s以上,最小调节时间精度为0.25μs,完全可以满足光积分时间的大范围实时自动无极调节。In order to improve the system＇s adaptability, detecting ability and accuracy of measurement the system needs to adjust charge-coupled device（CCD） light integration time with automatic real-time large-scale according to actual light intensity. On the basis of analyzing the characteristics, the working process and the driven timing of the TCD1304AP type of linear CCD, the self-adaptive system of CCD light integral time real-time large range based on field programmable gate arrays（FPGA） was designed. The light integral time calculation algorithm was studied and analyzed. The EP1C20F400C8 as a hardware platform, and the algorithm CCD driven timing was achieved by the Verilog language. The design was compiled, and integrated by the QuartusⅡ, and simulated by the Modelsim. The design was tested with natural light and LED light source. Experimental results indicate that the light integration time is from 10 μ#s to 10 s or above, the minimum adjustable time is 0.25 μs, and the system can meet the requirement of light real-time large-scale stepless adjustment

关 键 词：电荷耦合器件 现场可编程逻辑门阵列 驱动时序 光积分时间算法 大范围实时自调节 

分 类 号：TH74[机械工程—光学工程]