基于可靠性及噪声约束的电源/地线优化设计  

Optimum Design of Power and Ground Topology Subject to Reliability and Noise Constraints

作　　者：李春辉[1] 范明钰[1] 庄昌文[1] 虞厥邦[1] 黄劲 

机构地区：[1]电子科技大学光电子技术系 [2]AmbowCorp.

出　　处：《Journal of Semiconductors》2000年第8期816-821,共6页半导体学报（英文版）

基　　金：中国博士后基金资助项目

摘　　要：电源 /地线 ( P/G)拓扑结构的优化设计是超大规模集成电路 ( VLSI)中直接影响芯片性能的一个非常重要的问题 .通过对考虑可靠性及噪声的各项约束条件的分析 ,提出了一种时间复杂度为 O( N2m)基于最小代价生成树 ( MST)和改进的 Prim算法的快速构造算法 .实验结果表明 。In Very Large Scale Integrated (VLSI) physical design, power and ground (P/G) topology optimum design is an important issue.Based on the Minimal Spanning Tree (MST) heuristic and the modified Prim's algorithm,a fast constructive algorithm with the overall time complexity of O(N \+2\-m) is presented through the detailed analysis of the reliability and noise constraints. Experimental results show that our algorithm can effectively reduce the routing area where the condition of same constraints satisfied.

关 键 词：电源线/地线 可靠性 噪声约束 集成电路 VLSI 

分 类 号：TN402[电子电信—微电子学与固体电子学]