一种轨至轨10位逐次逼近模数转换器的设计  

Design of a Rail-to-Rail 10-Bit Successive Approximation A/D Converter

作　　者：陈铖颖[1] 黑勇[1] 胡晓宇[1] 

机构地区：[1]中国科学院微电子研究所,北京100029

出　　处：《微电子学》2012年第5期601-604,608,共5页Microelectronics

基　　金：02国家重大科技专项"高可靠库单元与产品设计"(Y1GZ212001)

摘　　要：设计了一款用于汽车电子MCU的轨至轨10位逐次逼近A/D转换器。采用单电容采样的DAC结构,保证A/D转换器的全摆幅输入范围。在后仿真验证中,采用频谱分析方法,标定寄生电容对DAC精度的影响,优化了版图结构。设计了片内低压差线性稳压器,提供稳定的电源电压信号。芯片采用GSMC 0.18μm 1P6M CMOS工艺实现。后仿真结果表明,在1.8V电源电压、51kHz输入信号频率、1MHz时钟频率下,无杂散动态范围(SFDR)为73.596dB,有效位数(ENOB)达到9.78位,整体功耗2.24mW,满足汽车电子MCU的应用需求。A rail-to-rail 10-bit successive approximation A/D converter for automotive MCU was presented.In this circuit,DAC structure with single sampling capacitor was used to ensure rail-to-rail input amplitude of the ADC.In post-layout simulation,effect of parasitic capacitor on DAC accuracy was marked by spectrum analysis and the layout was optimized.On-chip LDO was designed to provide stable voltage source.The ADC was implemented in GSMC′s 0.18 μm 1P6M CMOS process.Post-layout simulation results showed that the A/D converter achieved an SFDR of 73.596 dB and an ENOB of 9.78 bit for 51 kHz input frequency and 1 MHz clock frequency.Operating at 1.8 V power supply,the circuit consumed a power of 2.24 mW,satisfying requirement of automotive MCU.

关 键 词：轨至轨 逐次逼近 A/D转换器 D/A转换器 

分 类 号：TN432[电子电信—微电子学与固体电子学]