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作 者:齐凯[1]
出 处:《微电子学》2012年第5期622-626,共5页Microelectronics
摘 要:设计了一种用于1~4GHz射频前端的全集成CMOS宽带低噪声放大器。利用电流复用技术,对典型并联共栅-共源噪声抵消结构进行改进,以缓和噪声、增益及功耗之间的矛盾。采用在输入端引入电容电感并与MOS管寄生电容构成П形网络的方式来改善输入匹配特性。基于TSMC 0.18μm CMOS工艺进行设计和仿真。仿真结果表明,LNA噪声系数小于3.24dB,输入反射系数S11小于-8.86dB,增益大于15.6dB,IIP3优于+1.55dBm,在1.8V单电源供电条件下功耗仅为16.2mW。A fully integrated CMOS wide-band low noise amplifier (LNA) was designed for 1 - 4 GHz RF frontend. The improvement of typical parallel CG-CS noise canceling topology based on current reuse technique was discussed, which could ease the conflict between noise, voltage gain and power consumption. Method to improve input-matching performance by input-stage 1-I-network formed with parasitic capacitor of MOSFET and added inductor-capacitor network was presented. The circuit was designed and simulated based on TSMC's 0. 18 μm CMOS process. Simulation results showed that the LNA achieved a noise figure less than 3.24 dB, a voltage gain over 15.6 dB, an SHsmaller than -8.86 dB and an IIP3 better than 2-1.55 dBm. It dissipated 16.2 mW of power from a 1.8 V supply.
分 类 号:TN772.3[电子电信—电路与系统]
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