一种低相位噪声CMOS晶体振荡器的设计  

Design of a Low Phase-Noise CMOS Crystal Oscillator

作　　者：杨骁[1,2] 齐骋[1,2] 王亮 凌朝东[1,2] 

机构地区：[1]华侨大学信息科学与工程学院,福建厦门361021 [2]厦门市ASIC与系统重点实验室,福建厦门361008

出　　处：《微电子学》2012年第5期642-645,650,共5页Microelectronics

基　　金：福建省自然科学基金资助项目(2010J05135);厦门市科技计划项目(3502Z0113015);中央高校基本科研业务费资助项目(JB-ZR1128)

摘　　要：运用小信号等效模型和负阻分析法,对晶体振荡器的起振条件进行分析,并用Matlab进行了仿真验证。采用TSMC 0.18μm CMOS工艺,设计了一种基于Pierce三点式振荡器结构的14MHz晶体振荡电路。提出了一种新的幅度控制电路,提高了振荡器相位噪声性能,并降低了功耗。仿真结果表明,振荡器的相位噪声达到-129.5dBc/Hz@1kHz和-143.658dBc/Hz@10kHz,具有优良的低相位噪声特性。A 14 MHz CMOS crystal oscillator circuit based on Pierce three-point structure was designed in TSMC＇s 0.18 μm CMOS process.Start-up conditions for Pierce crystal oscillator circuit were analyzed with small signal equivalent circuit model and negative resistance analysis method,and simulated with Matlab.A new amplitude control circuit was proposed to reduce start-up time and minimize power consumption,and also reduce phase noise due to effects of nonlinearities on amplitude.Simulation results showed that the proposed circuit achieved a phase noise of-129.5 dBc/Hz at 1 kHz,and-143.658 dBc/Hz at 10 kHz,respectively,and an excellent phase noise performance.

关 键 词：晶体振荡器 幅度控制 相位噪声 起振时间 

分 类 号：TN432[电子电信—微电子学与固体电子学]