一种基于FPGA的分布式FIR数字滤波器设计  

A Design of Distributed FIR Digital Filter Based on FPGA

作　　者：李姮[1] 田克纯[1] 

机构地区：[1]桂林电子科技大学信息与通信学院

出　　处：《电声技术》2012年第10期28-32,共5页Audio Engineering

摘　　要：在宽带中频软件无线电台收发系统中,由于FIR滤波器具有良好的线性相位特性及实现的灵活性,通常将它作为数字上下变频中的整形低通滤波器。本设计采用altera公司的CycloneⅡ系列中的EP2C20Q240C8芯片,以一个8阶分布式算法的FIR低通数字滤波器电路为例,其主要通过LUT、加法器和移位寄存器实现。最后对该分布式算法进行了仿真验证。结果表明,该优化结构高效合理地利用FPGA硬件资源,可有效应用于高性能中频数字电台的信号处理模块。In the software defined radio transceiver of broad band intermediate frequency system, because the FIR filters have good linear phase characteristic and realization of flexibility, usually it is as reshaping lowpass filter of digital down converter. This design uses the altera company Cyclone H series of EP2C20Q240C8 chip, with an 8 order distributed algorithm of FIR lowpass digital filters circuit for example, its implemention through of the LUT, adder and the shift register. Finally the distributed algorithm is simulated, and the results show that the optimal structure can effectively applied in wireless station digital signal processing module, which has used of Field Programmable Gate Array hardware resources effectively and reasonably

关 键 词：软件无线电 FIR滤波器 分布式算法 FPGA 

分 类 号：TN912[电子电信—通信与信息系统]