3.3V/0.18μm恒跨导轨对轨CMOS运算放大器的设计  被引量:4

Design of a 3.3 V/0.18 μm constant-gm Rail-to-Rail CMOS operational amplifier

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作  者:马玉杰[1] 高俊丽[1] 后永奇[1] 耿晓勇[1] 杨建红[1] 

机构地区:[1]兰州大学物理科学与技术学院微电子研究所,甘肃兰州730000

出  处:《电子技术应用》2012年第11期48-50,54,共4页Application of Electronic Technique

摘  要:基于0.18μm CMOS工艺,设计了一种3.3 V低压轨对轨(Rail-to-Rail)运算放大器。该运算放大器的输入级采用3倍电流镜控制的互补差分对结构,实现了满电源幅度的输入输出和恒输入跨导;输出级采用前馈式AB类输出控制电路,保证了轨对轨的输出摆幅以及较强的驱动能力。仿真结果表明,直流开环增益为120 dB,单位增益带宽为5.98 MHz,相位裕度为66°,功耗为0.18 mW,在整个共模范围内输入级跨导变化率为2.45%。A Rail-to-Rail operational amplifier is designed with 0.18μm CMOS technology at 3.3 V single power supply. Its input stage is a complementary differential pair controlled by three-times current mirror to realize Rail-to-Rail common mode input range and constant trans-conductance,while the output stage employs a feed-forward biased class-AB control circuit, which ensures Rail-to-Rail output swing and strong driving capability. The simulation results indicate that the operational amplifier has achieved open loop DC gain of 120 dB, unit gain bandwidth of 5.98 MHz, phase margin of 66 degree, power dissipation of 0.18 mW, and the trans-conductance variation over the common-mode input range of only about 2.45%.

关 键 词:运算放大器 低压 恒跨导 轨对轨 

分 类 号:TN722[电子电信—电路与系统]

 

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