IEC 61850-9-2过程总线上的同步技术研究  

Research on Time Synchronization for IEC 61850-9-2 Process Bus

作　　者：罗彦[1] 段雄英[1] 张明志 田智文[1] 邹积岩[1] 

机构地区：[1]大连理工大学电气工程学院,辽宁省大连市116024 [2]百利纽泰克电气科技有限公司,天津市北辰区300409

出　　处：《电网技术》2012年第11期229-234,共6页Power System Technology

基　　金：教育部新世纪优秀人才支持计划资助(NCET-10-02820);大连市科学技术基金项目资助(2010J21DW002)~~

摘　　要：在遵循IEC 61850-9-2标准的数字化变电站过程总线上,采样值(sampled measurement values,SMV)报文的同步性能影响着整个系统的稳定性和可靠性。为保证过程总线上的SMV报文实时、可靠、准确地传输到间隔层的保护测控装置,设计了过程层的同步组网方案,并以此为基础分析了电子式互感器的信号处理通道和以太网通信信道对采样值传输延时的影响。提出一种可以在现场可编程门阵列(field-programmable gate array,FPGA)中实现的数字化同步技术。该技术以过采样技术、线性相位的移相技术、动态的内插重采样技术为核心,解决了IEC 61850-9-2过程总线上采样值报文的精确同步问题。现场测试表明提出的方法是可行的,能够应用到工程实践中。The synchronization performance of sampled measurement value（SMV） packets over process bus that follows IEC 61850-9-2 standard impacts stability and reliability of the whole control system.To ensure that the SMV packets can be reliably and precisely sent to protection and control（PC） intelligent electronic devices（IEDs） of bay level in real-time mode,a synchronized network scheme for the bay level is designed,and on this basis the impacts of the signal processing channel of electronic transformers and the Ethernet communication channel on transmission delay of SMV are analyzed.A digital synchronization technology that can be implemented by field-programmable gate array（FPGA） is proposed,in which some key technologies such as the over-sampling,the phase-shifter with linear-phase and dynamic interpolated re-sampling are employed to achieve highly accurate time synchronization of SMV packets in IEC 61850-9-2 process bus.On-site test shows that the proposed method is feasible and can be applied in engineering practice.

关 键 词：IEC 61850-9-2过程总线 数字化变电站 采样值报文 数字同步技术 精确同步 

分 类 号：TM734[电气工程—电力系统及自动化]