FPGA静电损伤容错系统设计及演化修复能力研究  

Design of Fault-tolerant System and Research of Evolvable Repairing Capability for the ESD Damaging Effects of FPGA

作　　者：巨政权[1] 原亮[2] 满梦华[1] 常小龙[1] 

机构地区：[1]军械工程学院静电与电磁防护研究所,石家庄050003 [2]军械工程学院计算机工程系,石家庄050003

出　　处：《高电压技术》2012年第11期2848-2857,共10页High Voltage Engineering

摘　　要：为探索静电放电对可编程逻辑器件的静电损伤(ESD)效应及其防护方法,选用人体模型,并利用ESS-606AESD模拟器对CycloneⅡFPGA芯片EP2C5Q208进行了ESD注入损伤效应试验。在此基础上,以演化硬件(EHW)技术为核心构建了一个具有自修复特性的强容错电子系统,并对其进行了故障注入试验。结果表明:ESD对FPGA不造成芯片损毁,只对放电管脚及其相关逻辑单元造成损伤,未放电管脚及芯片内部绝大部分逻辑单元功能完好。同时发现,系统演化修复能力与系统故障状况间具有较为明显的规律:(1)随着系统故障量的增大,影响系统演化修复能力的主要因素从演化算法的效率逐步转变为演化修复过程中的故障"避让"概率;(2)系统的演化修复能力与故障数量符合指数衰减规律。To explore the damaging effects of electrostatic on typical programmable logical device and to find the way of protection,using EP2C5Q208chip of Cyclone as a test device,we experimentally investigated electrostatic damaging（ESDing）effects.In the experiment,ESD source was produced by ESS-606AESD simulator with human body model.The results show that ESD does not destroy the inner part of FPGA chip but damage relevant logic cell,and pins and logic cells without connecting to the injected pin are impregnable.According to the aforementioned conclusions and FPGA reconfigurable characteristics,we established a strong-fault-tolerant electronic system based on self-repairing characteristic with the EHW technology,and obtained some relations between faults and the evolvable repairing ability by testing the system.The results reveal that,as the quantity of faults increases,the main influential factor of the evolvable repairing capability shifts from the efficiency of evolution strategy to the probability of escaping fault,moreover,the evolvable repairing ability and the fault quantity obey the law of exponential decay.

关 键 词：可编程逻辑器件 静电损伤(ESD) 容错系统 演化硬件(EHW) 自修复 演化修复能力 

分 类 号：TN791[电子电信—电路与系统] TN03