HR-1 DSP软件模拟器设计  

THE DESIGN OF SOFTWARE SIMULATOR HR-1 DSP

作　　者：陈敏超[1] 李笑天[1] 郭德源[1] 何虎[1] 

机构地区：[1]清华大学微电子研究所,北京100084

出　　处：《计算机应用与软件》2012年第11期101-103,176,共4页Computer Applications and Software

基　　金：核高基重大专项(2009ZX01034-001-001-001)

摘　　要：HR-1(华睿1号)是核高基重大专项中面向雷达应用的一款高性能DSP。为了方便HR-1的后续开发验证,需要一款相应的软件模拟器进行支持。在一款周期精度的模拟器——gem5的基础上,设计并实现了HR-1模拟器。实验结果表明该模拟器对HR-1的开发验证具有指导意义。HR-1 is a high-performance DSP for radar application in national major special projects of core electronic devices,high-end general chips and basic software products.For facilitating further development and verification of HR-1,a corresponding software simulator is required to support it.We design and implement a software simulator for HR-1 based on a cycle accuracy simulator gem5 in this paper.Experiment results show that the proposed simulator has an instructive meaning to the development and verification of HR-1.

关 键 词：HR-1 DSP Gem5 模拟器 

分 类 号：TP311.5[自动化与计算机技术—计算机软件与理论]