基于FPGAIP CORE的正弦信号发生器  

The Design of Sine Signal Generating Device Based on FPGA IP Core

作　　者：沈勇[1] 

机构地区：[1]菏泽学院机电系,山东菏泽274000

出　　处：《科技视界》2012年第29期107-108,共2页Science & Technology Vision

摘　　要：针对传统基于FPGA设计直接数字式频率合成器的方法存在的代码量大且使用较多的FPGA逻辑资源的不足,本文使用了一种基于Xilinx FPGA IP Core的DDS设计方法。直接调用已经封装好的DDS Core,无需编写DDS程序代码,只需熟悉core的接口定义和操作方法。实际应用表明,该方法能够大大提高设计效率且使用较少的FPGA资源,输出信号具有失真度低、稳定度好、分辨率高等优点。To aim at the defect of the traditional methods of Direct Digital Frequency Synthesis based on Xilinx FPGA, which require more program codes and occupy more FPGA resources. A new design method of DDS based on Xilinx FPGA IP CORE is introduced, it directly applies the encapsulated DDS core, and have no requirement of writing DDS program codes but being familiar with the interface definitions and operations of the core. The practical applications show that this method can greatly improve the design efficiency with less FPGA resources and can realizes programmable control of the frequency and phase of output wave, meanwhile, the signal has a low distortion, good reliability and high resolution.

关 键 词：DDS 现场可编程门阵列 直接数字频率合成 

分 类 号：TN911.6[电子电信—通信与信息系统]