基于CPLD的C8051F单片机高速数据采集系统设计  

Design of C8051F High-speed Data Acquisition System Based on CPLD

作　　者：陈宇[1] 张跃飞[2] 陈保立[2] 

机构地区：[1]中北大学机电工程学院,山西太原030051 [2]中北大学信息与通信工程学院,山西太原030051

出　　处：《光电技术应用》2012年第5期5-9,共5页Electro-Optic Technology Application

基　　金：山西省回国留学人员重点科研资助项目(2008003)

摘　　要：设计了以CPLD为采集控制单元的高速数据采集系统。此系统采用CPLD对串行AD和串行铁电存储器的进行时序控制,协助芯片单片机C8051F020进行逻辑控制和时序协调。系统可实现采样频率2 MHz、采样精度12-bits、体积小和功耗低。该设计已经成功应用在测试中,其性能和指标均优于应用要求。A high-speed data acquisition system using CPLD as an acquisition control unit is designed.CPLD is used to control the time sequence of serial AD and serial ferroelectric memory in the system.And CPLD is helpful to perform logic control and time sequence coordination on single chip C8051F020.The system has the characteristics of 2 MHZ sampling frequency,12-bits sampling precision,small volume and low power dissipation.The design is applied in experimental test successfully and its performance and indexes are both bet ter than application requirements.

关 键 词：数据采集 串行 CPLD 时序 控制 

分 类 号：TP273[自动化与计算机技术—检测技术与自动化装置]