基于RiBM算法的RS(204,188)译码器的设计  

Design of Reed-Solomon Decoder Based on RiBM Algorithm

作　　者：陈卓[1] 王春林[1] 毛曼卿[1] 刘克刚[1] 

机构地区：[1]武汉大学电子信息学院

出　　处：《电子技术（上海）》2012年第11期41-44,共4页Electronic Technology

摘　　要：文章介绍了基于FPGA的RS(204,188)译码器的实现,对于译码器的四大模块(伴随式求解模块、基于RiBM算法的关键方程求解模块、钱搜索错误位置和福尼算法求解错误值模块)的硬件实现给出了相应的方案。在Quartus II 9.1的平台下对于RS译码器系统的时序仿真测试结果表明,在系统时钟的频率为100MHz的情况下,RS(204,188)译码器的纠错能力能够达到8个的理论上限,数据吞吐率达到345Mb/s。This paper introduces the implementation of RS（204,188） decoder based on FPGA, and gives the corresponding scheme about the hardware implementation of the four key modules of the decoder （Syndrome calculator, key equation solver based on RiBM algorithm,Chien search and Error value evaluator based on Fony algorithm ）. The testing results of the timing simulation based on Quartus Ⅱ platform indicate that the error correction ability of the RS decoder can reach to the theoretical upper limit of Shannon at the frequency of 100MHz, and the data throughput is as high as 345Mb/s.

关 键 词：FPGA RiBM算法 RS译码器 Quartus Ⅱ 时序仿真 

分 类 号：TN925.93[电子电信—通信与信息系统]