Pulse swallowing frequency divider with low power and compact structure  

作　　者：高海军 孙玲玲 蔡超波 詹海挺 

机构地区：[1]Key Laboratory of RF Circuits and Systems,Ministry of Education,Hangzhou Dianzi University

出　　处：《Journal of Semiconductors》2012年第11期79-82,共4页半导体学报（英文版）

基　　金：supported by the Major State Basic Research Development Program of China(No.2010CB327403);the National Natural Science Foundation of China(No.61001066)

摘　　要：A pulse swallowing frequency divider with low power and compact structure is presented.One of the DFFs in the divided by 2/3 prescaier is controlled by the modulus control signal,and automatically powered off when it has no contribution to the operation of the prescaier.The DFFs in the program counter and the swallow counter are shared to compose a compact structure,which reduces the power consumption further.The proposed multi-modulus frequency divider was implemented in a standard 65 nm CMOS process with an area of 28×22μm;.The power consumption of the divider is 0.6 mW under 1.2 V supply voltage when operating at 988 MHz.A pulse swallowing frequency divider with low power and compact structure is presented.One of the DFFs in the divided by 2/3 prescaier is controlled by the modulus control signal,and automatically powered off when it has no contribution to the operation of the prescaier.The DFFs in the program counter and the swallow counter are shared to compose a compact structure,which reduces the power consumption further.The proposed multi-modulus frequency divider was implemented in a standard 65 nm CMOS process with an area of 28×22μm^2.The power consumption of the divider is 0.6 mW under 1.2 V supply voltage when operating at 988 MHz.

关 键 词：frequency divider low power prescaler multi-modulus CMOS 

分 类 号：TN772[电子电信—电路与系统]