A micro-power LDO with piecewise voltage foldback current limit protection  被引量:1

A micro-power LDO with piecewise voltage foldback current limit protection

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作  者:魏海龙 刘佑宝 郭仲杰 廖雪 

机构地区:[1]Xi'an Microelectronic Technology Institute

出  处:《Journal of Semiconductors》2012年第11期121-125,共5页半导体学报(英文版)

基  金:supported by the Ministerial "12th Five-Year" Pre-Research Fund of China(No.413080203)

摘  要:To achieve a constant current limit,low power consumption and high driving capability,a micro-power LDO with a piecewise voltage-foldback current-limit circuit is presented.The current-limit threshold is dynamically adjusted to achieve a maximum driving capability and lower quiescent current of only 300 nA.To increase the loop stability of the proposed LDO,a high impedance transconductance buffer under a micro quiescent current is designed for splitting the pole that exists at the gate of the pass transistor to the dominant pole,and a zero is designed for the purpose of the second pole phase compensation.The proposed LDO is fabricated in a BiCMOS process. The measurement results show that the short-circuit current of the LDO is 190 mA,the constant limit current under a high drop-out voltage is 440 mA,and the maximum load current under a low drop-out voltage is up to 800 mA. In addition,the quiescent current of the LDO is only 7μA,the load regulation is about 0.56%on full scale,the line regulation is about 0.012%/V,the PSRR at 120 Hz is 58 dB and the drop-out voltage is only 70 mV when the load current is 250 mA.To achieve a constant current limit,low power consumption and high driving capability,a micro-power LDO with a piecewise voltage-foldback current-limit circuit is presented.The current-limit threshold is dynamically adjusted to achieve a maximum driving capability and lower quiescent current of only 300 nA.To increase the loop stability of the proposed LDO,a high impedance transconductance buffer under a micro quiescent current is designed for splitting the pole that exists at the gate of the pass transistor to the dominant pole,and a zero is designed for the purpose of the second pole phase compensation.The proposed LDO is fabricated in a BiCMOS process. The measurement results show that the short-circuit current of the LDO is 190 mA,the constant limit current under a high drop-out voltage is 440 mA,and the maximum load current under a low drop-out voltage is up to 800 mA. In addition,the quiescent current of the LDO is only 7μA,the load regulation is about 0.56%on full scale,the line regulation is about 0.012%/V,the PSRR at 120 Hz is 58 dB and the drop-out voltage is only 70 mV when the load current is 250 mA.

关 键 词:power protection voltage foldback current limit micro-power LDO 

分 类 号:TM44[电气工程—电器] TN722.75[电子电信—电路与系统]

 

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