Full well capacity and quantum efficiency optimization for small size backside illuminated CMOS image pixels with a new photodiode structure  被引量:4

Full well capacity and quantum efficiency optimization for small size backside illuminated CMOS image pixels with a new photodiode structure

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作  者:孙羽 张平 徐江涛 高志远 徐超 

机构地区:[1]School of Electronic Information Engineering,Tianjin University

出  处:《Journal of Semiconductors》2012年第12期42-48,共7页半导体学报(英文版)

基  金:Project supported by the National Natural Science Foundation of China(Nos.61036004,60976030)

摘  要:To improve the full well capacity (FWC) of a small size backside illuminated (BSI) CMOS image sensor (CIS), the effect of photodiode capacitance (Cpo) on FWC is studied, and a reformed pinned photodiode (PPD) structure is proposed. Two procedures are implemented for the optimization. The first is to form a varying doping concentration and depth stretched new N region, which is implemented by an additional higher-energy and lower-dose N type implant beneath the original N region. The FWC of this structure is increased by extending the side wall junctions in the substrate. Secondly, in order to help the enlarged well capacity achieve full depletion, two step P-type implants with different implant energies are introduced to form a P-type insertion region in the interior of the stretched N region. This vertical inserted P region guarantees that the proposed new PD structure achieves full depletion in the reset period. The simulation results show that the FWC can be improved from 1289e- to 6390e-, and this improvement does not sacrifice any image lag performance. Additionally, quantum efficiency (QE) is enhanced in the full wavelength range, especially 6.3% at 520 nm wavelength. This technique can not only be used in such BSI structures, but also adopted in an FSI pixel with any photodiode-type readout scheme.To improve the full well capacity (FWC) of a small size backside illuminated (BSI) CMOS image sensor (CIS), the effect of photodiode capacitance (Cpo) on FWC is studied, and a reformed pinned photodiode (PPD) structure is proposed. Two procedures are implemented for the optimization. The first is to form a varying doping concentration and depth stretched new N region, which is implemented by an additional higher-energy and lower-dose N type implant beneath the original N region. The FWC of this structure is increased by extending the side wall junctions in the substrate. Secondly, in order to help the enlarged well capacity achieve full depletion, two step P-type implants with different implant energies are introduced to form a P-type insertion region in the interior of the stretched N region. This vertical inserted P region guarantees that the proposed new PD structure achieves full depletion in the reset period. The simulation results show that the FWC can be improved from 1289e- to 6390e-, and this improvement does not sacrifice any image lag performance. Additionally, quantum efficiency (QE) is enhanced in the full wavelength range, especially 6.3% at 520 nm wavelength. This technique can not only be used in such BSI structures, but also adopted in an FSI pixel with any photodiode-type readout scheme.

关 键 词:backside illuminated CMOS image sensor PHOTODIODE full well capacity quantum efficiency small size pixel 

分 类 号:TP212[自动化与计算机技术—检测技术与自动化装置] TN312[自动化与计算机技术—控制科学与工程]

 

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