基于DMA的大批量数据快速传输模块设计  

Design and Implementation of the Mass Data Fast Transmission Module Between Nios II and FPGA Based on DMA

作　　者：杨立成[1] 刘丹峰[1] 史继辉[2] 

机构地区：[1]中国人民解放军63716部队卫星通信站 [2]中国人民解放军63886部队技术室

出　　处：《电子科技》2012年第12期49-51,共3页Electronic Science and Technology

摘　　要：针对Altera公司SOPC解决方案中,DMA模块无法直接读/写FPGA外设的情况,提出了基于Avalon总线流传输模式的通用DMA读/写控制模块的设计,设计了两个自定义外设,实现了DMA对FPGA外设的高速数据存取和Nios II与FPGA大批量数据的快速传输。介绍了Avalon-MM总线规范,阐述了系统架构以及DMA读控制器的设计,测试结果表明,该方法是一种高效可行的解决方案。In view of the fact that DMA module can not read/write FPGA peripherals directly in SOPC solutions of Ahera company, this paper puts forward the design of general DMA read/write control module based on the trans- mission mode of Avalon bus flow. The design of two custom peripherals makes it possible for DMA to access High- speed data of FPGA peripherals. It implements rapid transmission of bulk data between the Nios II and FPGA. The paper briefly introduces the Avalon-MM bus norms, and elaborates the design of system architecture and read control- ler of DMA. Finally the test results show that the solution is efficient and feasible.

关 键 词：SOPC NIOS II DMA AVALON总线 

分 类 号：TN06[电子电信—物理电子学]