一种10Mb/s 1553B总线接口的设计  

Design of a 10 Mb/s 1553B Bus Interface

作　　者：杨兵[1,2] 于宗光[1,2] 魏敬和[2] 

机构地区：[1]江南大学物联网学院,江苏无锡214122 [2]中国电子科技集团公司第五十八研究所,江苏无锡214035

出　　处：《微电子学》2012年第6期782-786,791,共6页Microelectronics

摘　　要：1553B是一种数字式命令/响应型时分多路航空数据总线标准。传统的1Mb/s 1553B总线接口电路已不能满足现代高速航空、航天数据通讯的要求。介绍了10Mb/s 1553B总线接口的设计,对关键模块进行了详细分析与设计,并通过编译平台Modelsim6.0进行功能仿真,采用Xilinx VertexⅣFPGA硬件系统进行组网应用验证。结果表明,该设计满足1553B协议功能要求,总线速率达到10Mb/s,满足10Mb/s 1553B总线组网应用的需求。155313 bus interface is a time division multiplex aeroplane data bus standard prescribing numeric instructions and responses. The conventional 1 Mb/s 1553B bus interface circuit can no longer satisfy the requirement of data communication for modern high-speed aircraft and spacecraft applications. A 10 Mb/s 155313 bus Interface was designed. The structure of the system and its key modules were described in detail. The 1553B bus interface was simulated with Modelsim 6. 0 for function verification, and validated on FPGA （Vertex IV） hardware platform for its network application. Results showed that the design met the functional requirement of 155313 protocol and the bus data transmission rate reached 10 Mb/s, satisfying requirement of its network application.

关 键 词：1553B总线 总线接口 FPGA 

分 类 号：TN492[电子电信—微电子学与固体电子学]