基于Verilog HDL的DDS信号发生器的设计与实现  

Design and Implementation of DDS Signal Generator Based on Verilog HDL

作　　者：张继森[1] 杨恢东[1] 黄波[1] 曾莉欣[1] 

机构地区：[1]暨南大学信息科学与技术学院电子工程系,广州510632

出　　处：《微电子学》2012年第6期819-822,共4页Microelectronics

基　　金：广东省省部产学研资助项目(2008A090400011);广东省自然科学基金资助项目(06025195;9151027501000076);广东省粤港关键领域招标项目(2008A011800005;2009205115;20090101-4);深港创新圈资助项目(ZYB200907080105A)

摘　　要：基于数字频率合成(DDS)技术,采用分频方法,设计了一种可输出任意起始相位和一定频率范围的正弦波、方波、锯齿波、三角波的信号发生器。在QuartusII软件上进行仿真,结果表明,设计的DDS信号发生器达到预期要求,系统集成度高、扩展性好、控制灵活。A new signal generator was designed and implemented based on direct digital frequency synthesizer （DDS） technology using frequency divider, which could output sine wave, square wave, sawtooth wave and triangular wave with any starting phase in certain frequency range. Results from simulation with QuartuslI and Verilog HDL showed that the DDS system satisfied requirements of the design, and it was very easy to achieve frequency and phase modulatiorL

关 键 词：数字频率合成 信号发生器 现场可编程门阵列 

分 类 号：TN74[电子电信—电路与系统]