用于二-十进制转换的低功耗除法器  

Low Power Divider for Binary-to-Decimal Data Conversion

作　　者：侯立刚[1] 彭晓宏[1] 耿淑琴[1] 汪金辉[1] 

机构地区：[1]北京工业大学VLSI及系统集成实验室,北京100124

出　　处：《微电子学》2012年第6期832-835,共4页Microelectronics

基　　金：国家自然科学基金资助项目(60976028)

摘　　要：设计了一种用于二-十进制转换的低功耗除法器。在光栅检测芯片EYAS和低功耗火炮计数芯片ZCOUNT中,需要进行32位无符号数的二-十进制转换,初始采用无符号定点除法器(UFP)方案,随后提出了快速UFP除法器(FUFP)方案,以节约功耗和运行时间。与UFP方案相比,FUFP方案中,芯片面积增加了19%,但功耗降低了8%～10%,运行周期缩短了43%～72%。A low power divider for binary-to-decimal data conversion was presented. An unsigned fixed-point divider （UFP） scheme was adopted for binary-to-decimal conversion of 32-bit unsigned data in grating detection chip EYAS and low power gun counter chip ZCOUNT. Based on UFP scheme, a fast UFP divider （FUFP） scheme was proposed to save time and power. With 19% of area increase, the FUFP scheme saved 8% to 10% of power and 43% to 72% of operation cycles depending on different dividends, compared to UFP.

关 键 词：数位循环 二-十进制转换 无符号定点除法器 

分 类 号：TN47[电子电信—微电子学与固体电子学]