TISA： Reconfigurable System for Template-Based Stream Computing  

作　　者：YANG Qianming WU Nan WEN Mei QUAN Wei ZHANG Chunyuan 

机构地区：[1]College of Computer Science and Engineering,National University of Defense and Technology(NUDT),Changsha 410073,China

出　　处：《Chinese Journal of Electronics》2012年第4期594-598,共5页电子学报（英文版）

摘　　要：For High performance Digital signal pro- cess （HP-DSP） system with low-volume market, perfor- mance/watt, flexibility and cost of design are becoming goals pursued by architects. This paper presents a template-based reeonfigurahle platformTISA-II, where application-specific stream computing system can be constructed fast, efficiently and conveniently. This paper de- scribes the platform in terms of architecture, programming model, a hardware/software co-design flow, and our implementation. Finally, the paper evaluates TISA-II by a real applications HD H.264 encoding. The results are encouraging, TISA-II with 4 computing node achieves 50-100x speedup over embedded programmable processors （C64 DSP, MIPS） and 3x over dedicated stream processor （Storm）, while consequently performance per watt that is also greater.

关 键 词：Stream architecture Field programable gate arrays （FPGA） Reconfigurable computing Accelerator. 

分 类 号：TP332.1[自动化与计算机技术—计算机系统结构] TV64[自动化与计算机技术—计算机科学与技术]