MPEG-2编码器中一种新型的DCT/IDCT结构  

A Novel DCT/IDCT Architecture Based on MPEG-2 Encoder

作　　者：付宇卓[1] 季振洲[1] 胡铭曾[1] 

机构地区：[1]哈尔滨工业大学计算机系,哈尔滨150001

出　　处：《高技术通讯》2000年第7期45-50,共6页Chinese High Technology Letters

基　　金：863计划资助项目!(863306030702)

摘　　要：针对DCT变换编码是MPEG 2标准中运算量较大的部分 ,采用行列分解法设计的 8× 8二维DCT/IDCT结构 ,仅用一个 1维DCT核完成MPEG 2编码的二维DCT/IDCT变换 ,1维DCT核的流水数据宽度为两像素宽 ,较同类结构[1,2 ] 有更好的利用率。该设计是在完成MPEG 2编码器结构实现时提出的 ,整体结构规整 ,适合VLSI实现 。or A 2 D DCT/DCT architecture based on row column method is proposed,which works as a part of a DCT encoder by using 1 D DCT core The data width of the core is two pixels,which has better efficiency than traditional method The novel architecture given when a MPEG 2 encoder is being implemented fits VLSI for its characteristic of regularity and it is beneficial to the application

关 键 词：预处理 后处理 行列变换存储器 编码器 

分 类 号：TN76[电子电信—电路与系统]