面向WSN结点SoC的逐次逼近模数转换器  

Successive Approximation Register ADC for SoC in WSN

作　　者：刘珂[1] 杜占坤[1] 马骁[1] 邵莉[1] 毕见鹏[1] 傅健[1] 

机构地区：[1]中国科学院微电子研究所,北京100029

出　　处：《半导体技术》2013年第1期1-5,15,共6页Semiconductor Technology

基　　金：国家科技重大专项课题资助项目(2010ZX03006-003-02)

摘　　要：设计了一种适合于无线传感网(WSN)结点SoC芯片传感器接口电路应用的12 bit精度逐次逼近型(SAR)模数转换器(ADC)。为了实现高精度、低成本,并兼容射频CMOS工艺的要求,利用全差分结构和带有Auto-zero失调消除功能的比较器提高转换精度。采用分段式电容阵列DAC减小芯片占用面积,通过构造符合精度要求的MOM电容单元,使电容阵列符合射频CMOS的工艺特点,利于嵌入式应用。同时,采取增加辅助电容的办法扩大输入信号范围。该ADC在0.18μm 1P6M标准CMOS工艺下实现,版图面积为0.9 mm2,最高采样速率为1 MS/s,在1.8 V电源电压下,整体功耗仅为2 mW。A 12 bit successive approximation register （SAR） analog to digital converter （ADC） was proposed. For the application of SoC sensor interface in the node of wireless sensor network （WSN）, the requirements of high precision, low cost and compatibility with RF CMOS technology should be satisfied. Several techniques were adopted, including the fully differential architecture and auto-zero comparator for high precision, split capacitor array DAC for low cost and MOM capacitor unit for compatibility. Besides, auxiliary capacitor was added to enlarge the input range. The proposed ADC was implemented in standard 0. 18 μm 1P6M CMOS technology, and the chip area is 0.9 mm2. The power dissipation is 2 mW at 1.8 V power supply and the highest sample speed reaches 1MS/s.

关 键 词：逐次逼近型 模数转换器 无线传感网 片上系统 低功耗 

分 类 号：TN432[电子电信—微电子学与固体电子学]