一种基于RapidIO协议的光纤总线硬件架构设计与分析  

Hardware Architecture Design and Analysis of a Fiber Optic Bus Based on the RapidIO Protocol

作　　者：千应庆[1] 王晓锋[1] 劳力[1] 徐润华[1] 蒋良荭[1] 

机构地区：[1]南京理工大学机械工程学院,江苏南京210094

出　　处：《兵工学报》2012年第12期1480-1484,共5页Acta Armamentarii

摘　　要：研究了一种基于RapidIO协议的光纤总线,该总线采用多个节点对一个交换板的星型拓补结构,通过高性能、抗干扰的光纤通道,将节点与交换板的短距离(十几厘米)的电互连拓展成远距离(几十米)的光纤互连,采用交换板背板级联和光纤级联两种方式实现总线节点的扩展。重点设计了节点、交换板、后I/O板的硬件架构,并对照RapidIO协议,分析了传输过程中时延开销对传输性能的影响,提出了采用计算时延保证传输性能的设计方法,从而计算得到光纤的极限长度。在初步工程设计阶段,测试了串行RapidIO数据通过光纤发送和接收电路后的波形参数,对照眼图模板验证其性能良好。A fiber optic bus based on the RapidIO protocol was designed.The bus uses a star topology structure.It expanded the short-distance electrical interconnection between node and switch board into a long-distance fiber optic interconnection through high-bandwidth and anti-jamming fiber channel,and it employed the backplane cascaded method and fiber optic cascaded method to achieve the expansion of the bus node.The paper focused on the hardware architecture design of the node,switch board,and the I/O board.According to the RapidIO protocol,through analyzing the impact of the delay on the transmission performance,it proposed the design method of adopting transmission delay calculation to guarantee the transmission performance,and then calculated the ultimate length of the optical fiber.In the preliminary stage of engineering design,it tested the waveform parameters of serial RapidIO data through fiber optic transmitter and receiver circuit,and verified its performance.

关 键 词：通信技术 RAPIDIO 光纤总线 传输时延 

分 类 号：TN818[电子电信—信息与通信工程]