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机构地区:[1]Institute of RF- & OE-ICs,School of Information Science and Engineering,Southeast University
出 处:《Journal of Semiconductors》2013年第1期66-73,共8页半导体学报(英文版)
基 金:Project supported by the National Science and Technology Major Project,China (No.2010ZX03007-002-01);the State Key Development Program for Basic Research of China (No.2010CB327404)
摘 要:A fully integrated hybrid integer/fractional frequency synthesizer is presented.With a single multiband voltage-controlled-oscillator(VCO),the frequency synthesizer can support GPS,Galileo,Compass and TDSCDMA standards.Design is carefully performed to trade off power,die area and phase noise performance.By reconfiguring between the integer mode and fractional mode,different frequency resolution requirements and a constant loop bandwidth for each standard can be achieved simultaneously.Moreover,a long sequence length,reduced hardware complexity multi-stage-noise-shaping(MASH).-.modulator is employed to reduce fractional spur in the fractional mode.Fabricated in a 0.18 m CMOS technology,the frequency synthesizer occupies an active area of 1.48 mm2 and draws a current of 13.4-16.2 mA from a 1.8 V power supply.The measured phase noise is lower than-80 dBc/Hz at 100 kHz offset and-113 to-124 dBc/Hz at 1 MHz offset respectively,while the measured reference spur is-71 dBc in integer mode and the fractional spur is-65 dBc in fractional mode.A fully integrated hybrid integer/fractional frequency synthesizer is presented.With a single multiband voltage-controlled-oscillator(VCO),the frequency synthesizer can support GPS,Galileo,Compass and TDSCDMA standards.Design is carefully performed to trade off power,die area and phase noise performance.By reconfiguring between the integer mode and fractional mode,different frequency resolution requirements and a constant loop bandwidth for each standard can be achieved simultaneously.Moreover,a long sequence length,reduced hardware complexity multi-stage-noise-shaping(MASH).-.modulator is employed to reduce fractional spur in the fractional mode.Fabricated in a 0.18 m CMOS technology,the frequency synthesizer occupies an active area of 1.48 mm2 and draws a current of 13.4-16.2 mA from a 1.8 V power supply.The measured phase noise is lower than-80 dBc/Hz at 100 kHz offset and-113 to-124 dBc/Hz at 1 MHz offset respectively,while the measured reference spur is-71 dBc in integer mode and the fractional spur is-65 dBc in fractional mode.
关 键 词:MULTI-STANDARD frequency synthesizer global navigation satellite system(GNSS) TD-SCDMA cellular network positioning
分 类 号:TN74[电子电信—电路与系统] TN965.5
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