Multi-Rate SerDes Transceiver for IEEE 1394b Applications  

作　　者：Long-Fei Wei Jin-Yue Ji Hai-Qi Liu Li-Nan Li Qiang Li 

机构地区：[1]Centre for Communication Circuits and Systems, University of Electronic Science and Technology of China [2]Integrated Device Technology [3]Department of Electronic Information Engineering,Beijing Jiaotong University [4]Integrated Circuits & Electronics (ICE) Lab,Department of Engineering, Aarhus University

出　　处：《Journal of Electronic Science and Technology》2012年第4期327-333,共7页电子科技学刊（英文版）

基　　金：supported by the National Natural Science Foundation of China under Grant No. 61006027;the New Century Excellent Talents Program under Grant No. NCET-10-0297

摘　　要：This paper presents the implementation of a multi-rate SerDes transceiver for IEEE 1394b applications. Simple and effective pre-emphasis and equalizer circuits are used in the transmitter and receiver, respectively. A phase interpolator based clock and data recovery circuit with optimized linearity is also described. With an on-chip fully integrated phase locked loop, the transceiver works at data rates of 100 Mb/s, 400 Mb/s, and 800 Mb/s, supporting three different operating modes of S100b, S400b, and S800b for IEEE 1394b. The chip has been fabricated using 0.13 μm technology. The die area of transceiver is 2.9×1.6 mm2^ including bonding pads and the total power dissipation is 284 mW with 1.2 V core supply and 3.3 V input/output supply voltages.This paper presents the implementation of a multi-rate SerDes transceiver for IEEE 1394b applications. Simple and effective pre-emphasis and equalizer circuits are used in the transmitter and receiver, respectively. A phase interpolator based clock and data recovery circuit with optimized linearity is also described. With an on-chip fully integrated phase locked loop, the transceiver works at data rates of 100 Mb/s, 400 Mb/s, and 800 Mb/s, supporting three different operating modes of S100b, S400b, and S800b for IEEE 1394b. The chip has been fabricated using 0.13 μm technology. The die area of transceiver is 2.9×1.6 mm2^ including bonding pads and the total power dissipation is 284 mW with 1.2 V core supply and 3.3 V input/output supply voltages.

关 键 词：Clock and data recovery equalizer firewire IEEE 1394 PRE-EMPHASIS SerDes. 

分 类 号：TN859[电子电信—信息与通信工程]