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作 者:TAN Mingxing LIU Xianhua ZHANG Jiyu TONG Dong CHENG Xui
机构地区:[1]Engineering Research Center of Microprocessor and System Ministry of Education, Peking University, Beijing 100871, China [2]Shenzhen Graduate School of Peking University, Shenzhen 518055, China
出 处:《Chinese Journal of Electronics》2012年第3期414-418,共5页电子学报(英文版)
摘 要:Indirect branch prediction is important to boost instruction-level parallelism in modern proces- sors. Previous indirect branch predictions usually cannot achieve high performance for the ineffectiveness of cor- related information. This paper proposes the Compiler- assisted value correlation (CVC), a hardware/software co- operative indirect branch prediction scheme. The key is to identify effective value correlation based on program sub- structures. A compiler algorithm is introduced to iden- tify the effective value correlation based on three program substructures: virtual function calls, switch-case state- ments and function pointer calls. The compiler-identified value correlation is transferred to the dynamic predictor by extending the instruction set architecture. At runtime, the processor relies on a low-complexity Correlated value buffer (CVB) to maintain the compiler-identified value cor- relation and to guide the target address prediction for those indirect branch instructions. Our evaluations show that CVC prediction can significantly improve the perfor- mance with little extra hardware support over the tradi- tional BTB predictor and the state-of-the-art VBBI pre- diction.
关 键 词:PROCESSOR Indirect branch prediction Compiler-assisted value correlation Program substruc-ture.
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