基于FPGA的PCIe总线接口的DMA传输设计  

Design of DMA Transmission with PCIe Bus Interface Based on FPGA

作　　者：李木国[1] 黄影[1] 刘于之[1] 

机构地区：[1]大连理工大学海岸与近海工程国家重点实验室,辽宁大连116023

出　　处：《计算机测量与控制》2013年第1期233-235,249,共4页Computer Measurement &Control

基　　金：中央高校基本科研业务费专项资金(DUT10JR14);辽宁省教育厅高校科研计划项目(LS2010032)

摘　　要：串行的PCIe接口是第3代I/O互连标准,具有高速率和高带宽等特点,克服了传统PCI总线在系统带宽、传输速度等方面的固有缺陷,具有很好的应用前景;本设计使用Altera公司FPGA提供的PCIe IP硬核提出了一种实现PCIe接口的方法,并针对其高带宽的优势,设计了PCIe总线的高速DMA数据传输方案;利用自行开发的PCIe接口板,在QuartusⅡ11.0开发环境下进行SignalTapⅡ在线仿真并实际传输验证,DMA传输带宽在500MB/s以上,表明该设计方案可以满足PCIe总线传输带宽的要求。The serial PCIe interface is the third generation I/O interconnect standard with high--speed and high bandwidth characteris- tics, and it overcomes the inherent shortcomings of the traditional PCI bus in the system bandwidth and transmission speed, which has the very good application prospects. This design puts forward a method to implement PCIe interface based on Altera FPGA PCIe IP hard core, designs the PCIe bus high--speed DMA data transfer program for its high bandwidth advantage. At last, using self--developed PCIe inter- face board, the paper gives the experiment results in Quartus 1I 11. 0 and through stimulation and verification, DMA transfer bandwidth is more than 500MB/s, the design can satisfy the demands of PCIe bus large bandwidth.

关 键 词：PCIE FPGA IP硬核 DMA方式 

分 类 号：TP274[自动化与计算机技术—检测技术与自动化装置]