VLIW DSP指令级精度模拟器的快速实现方法  

Rapid implementation of instruction-level precision VLIW DSP simulator

作　　者：朱大林[1] 郭德源[1] 何虎[1] 

机构地区：[1]清华大学微电子学研究所,北京100084

出　　处：《计算机工程与设计》2013年第1期256-261,共6页Computer Engineering and Design

基　　金：核高基重大专项基金项目(2009ZX01034-001-001-001)

摘　　要：为了以最小代价开发出超长指令字(VLIW)数字信号处理器(DSP)的指令级精度的模拟器,缩短开发周期,提出了一种基于开源模拟器(gem5)的开发方法。对gem5模拟器和VLIW DSP的指令执行流程分别进行分析,指出指令在gem5模拟器上以纯32位指令环境顺序执行和指令在VLIW DSP上以16/32位混合指令环境并行执行之间的矛盾是开发的难点。在gem5的顺序执行模型的基础上,通过加入并行的判决、执行机制和16/32位混合指令的取指机制建立了VLIWDSP的模型,并具体实现了一款VLIW DSP的模拟器。通过一组针对每条指令的测试程序和一组DSP典型应用程序验证了该方法的正确性和可行性。To Develop a simulator of a very long instruction word （VLIW） digital signal processor （DSP） with instruction-level preci- sion at the lowest cost, and reduce the product develop lifecycle, a develop method based on an open source simulator （gemS） is presen- ted. Firstly, the instruction execution processes of gem5 and VLIW DSP are analyzed respectively, it is pointed out that the conflict be- tween the sequential execution with pure 32 bit instruction environment on gem5 simulator and the parallel execution with 16/32 mixed instruction environment on VLIW DSP is one of the difficulties in the development. Then, based on the sequential execution model of gem5 simulator, a VLIW DSP model is constructed by adding a parallel judgment and execution mechanism and a 16/32 bit mix instruc- tion fetch mechanisrrL A VLIW DSP simulator is implemented. Finally, by running a set of test case for every instruction and a set of typical application of DSP, the validity and feasibility of the develop method is demonstrated.

关 键 词：超长指令字(VLIW) 数字信号处理器(DSP) 处理器建模 模拟器 指令级精度 

分 类 号：TP337[自动化与计算机技术—计算机系统结构]