用于PET成像系统的流水线ADC设计  

Design of a Pipeline ADC for PET Imaging Application

作　　者：薛菲菲[1] 高武[1] 郑然[1] 高德远[1] 

机构地区：[1]西北工业大学计算机学院,陕西西安710065

出　　处：《微电子学与计算机》2013年第1期61-64,共4页Microelectronics & Computer

基　　金：国家自然科学基金项目(60972157;61101190);国家重大科学仪器专项(2011YQ040082)

摘　　要：针对高性能PET前端电子微系统结构中多通道前端读出电路和高速高分辨率模数转换的特点,设计了12bit 10MHz的流水式ADC.整个电路主要由采样保持电路、乘法数模转换电路、子模数转换电路、延时对准电路、数字校正电路、两相不交叠时钟电路六个模块组成.电路采用TSMC 0.18μm mixed signal CMOS工艺实现.电路仿真结果表明,流水线ADC的DNL为-0.6832～0.5994LSB,INL为-0.7997～0.7576LSB,SNR为62.140 6dB,ENOB为10.03bit.本文所设计的Pipelined ADC电路性能指标满足系统设计的要求.Based on the multi-channel front-end readout circuit and high-speed high-resolution ADC of high performance PET front-end electron micro system structure,a 12 bit 10 MHz pipeline ADC is designed.The whole circuit consist of S/H circuit,MDAC circuit,Sub_ADC circuit,delay alignment circuit,digital correction circuit,two-phase non-overlap clock circuit.The whole circuit is designed in TSMC 0.18 μm mixed signal CMOS technology.Simulation results show that,pipeline ADC has-0.6832/0.5994LSB DNL,-0.7997/0.7576LSB INL,62.1406 dB SNR,and 10.03 bit ENOB.The pipeline ADC presented in this paper satisfy the design requirements of the system.

关 键 词：PET 流水线ADC 采样保持 乘法数模转换 

分 类 号：TN4[电子电信—微电子学与固体电子学]