基于ADF4360-9的高稳定度频率合成器设计  

Phase locked loop frequency synthesizer based on ADF4360-9

作　　者：芦旭[1,2] 郭伟[1] 杨莹[1,2] 

机构地区：[1]中国科学院国家授时中心,西安710600 [2]中国科学院研究生院,北京100039

出　　处：《电子测量技术》2013年第1期19-22,共4页Electronic Measurement Technology

摘　　要：根据锁相环的基本原理,介绍了一种基于专用锁相环芯片ADF4360-9的高稳定度低噪声频率合成器设计。给出了系统设计的硬件原理图和各个模块的设计要点。包括芯片的介绍和芯片的外围主要电路的设计。给出了专用锁相环芯片的专用开发工具所得出的仿真相噪图。从仿真图可以看出,基于专用锁相环芯片ADF4360-8的频率合成器就有低相位噪声的特点。因此可以广泛应用于对噪声敏感的电子设备中。According to the basic theory of phase locked loop, introduced a way based on phase locked loop of high stability signal low phase noise frequency synthesizer design. This paper gives the system hardware schematic and design key points, include the description of the chip and the main part hardware design. In addition, give the emulation picture of phase noise which result from the special tool for PLL design. From the result we can know that the design based on the frequency synthesizer chip ADF4360-9 has the character of output frequency low phase noise, so can used to the device which sensitive to the noise.

关 键 词：频率合成器 锁相环 相位噪声 

分 类 号：TN742[电子电信—电路与系统]