基于FPGA的TD-LTE系统中Turbo译码的仿真与实现  

Simulation and Realization of Turbo Decoding in FPGA-Based TD-LTE System

作　　者：陈发堂[1] 谭兵[1] 施流伟[1] 

机构地区：[1]重庆邮电大学通信与信息工程学院,重庆400065

出　　处：《微电子学》2013年第1期51-55,共5页Microelectronics

基　　金：国家科技重大专项项目:"TD-LTE无线综合测试仪表开发"(2009ZX03002-009);"TD-LTE射频一致性测试系统"(2011ZX03001-003-01)

摘　　要：基于Log-MAP算法,提出一种利用Virtex-5系列FPGA芯片实现Turbo译码算法的方案。分析研究了Turbo码的译码算法以及FPGA与DSP之间数据的并行传输,并以Virtex-5芯片为硬件平台,进行了测试仿真、综合实现、板级验证、联机验证等工作。实验结果表明,该实现方案具有良好的可行性和稳定性,已经应用在TD-LTE无线综合测试仪中。A scheme to realize Turbo decoding algorithm on Virtex-5 FPGA chip was proposed based on Log-MAP algorithm.Implementation of Turbo decoding algorithm based on FPGA,and data parallel transmission between FPGA and DSP were studied.With Virtex-5 as hardware platform,test simulation,synthesis implementation,on-board and on-line tests were performed to verify the scheme.Experimental results showed that this scheme,which had been used in TD-LTE wireless comprehensive tester,had a very good feasibility and stability.

关 键 词：TD-LTE系统 TURBO译码 FPGA VIRTEX-5 LOG-MAP算法 

分 类 号：TN929.532[电子电信—通信与信息系统]