基于FPGA的嵌入式千兆以太网接口设计  

Design of gigabit ethernet interface based on FPGA

作　　者：刘存[1] 周晓波[1] 

机构地区：[1]北京交通大学电子信息工程学院,北京100044

出　　处：《光通信技术》2013年第2期56-59,共4页Optical Communication Technology

基　　金：中央高校基本科研业务费专项资金(No.2011JBZ002)资助

摘　　要：运用SOPC技术流程和嵌入式系统完成了基于FPGA千兆速率接口设计,工程主要分为硬件环境的构建和软件执行环境的配置。设计实现了将以太网的传输速率提高到1000M模式,具有一定的工程实际参考价值。The design of Gigabit ethernet interface based on FPGA is accomplished by using technology of SOPC and embedded system in this thesis in order to improve the ethernet data transmission speed,the whole project consists of the construction of hardware and configuration of soRware according to the SOPC technol- ogy of the development process. The transmission rate is increased to 1000M in this design, having certain ref- erence value for engineering practice.

关 键 词：SOPC 千兆以太网 FPGA NiosⅡ处理器系统 

分 类 号：TN919[电子电信—通信与信息系统]