磁通门CMOS接口电路设计(英文)  

Design of Fluxgate CMOS Interface Circuit

作　　者：董长春[1] 陈伟平[2] 任明远[1,2] 刘晓为[2] 周治平[2] 

机构地区：[1]哈尔滨理工大学集成电路设计与集成系统系,哈尔滨150001 [2]哈尔滨工业大学微电子科学与技术系,哈尔滨150001

出　　处：《纳米技术与精密工程》2013年第2期146-151,共6页Nanotechnology and Precision Engineering

基　　金：黑龙江省自然科学基金资助项目(F201232)

摘　　要：为实现三端式磁通门接口电路的集成,提出一种新颖的包括驱动和检测功能的磁通门CMOS接口电路.驱动电路采用开关网络和负反馈环实现全差分驱动来替代传统的隔离变压器驱动,通过实时平衡驱动电极上的电压信号来抑制电源电压的漂移以及温度变化的影响.检测电路利用驱动信号二倍频为基准的开关相敏解调实现二次谐波提取,同时采用闭环检测,以提高系统线性度.该电路基于0.5μm CMOS工艺实现.测试结果表明,该微型磁通门磁力计(三端式探头和CMOS接口电路)的灵敏度为30.8μV/nT,非线性度为0.62%,电源电压为10 V,功耗为100 mW,芯片面积仅为15.54 mm2.A novel CMOS interface circuit that has driving and detecting functions is presented to achieve the integration of interface circuit of fluxgate with three tips. The driving circuit adopts the switch network and negative feedback loop for fully differential drive in substitution for traditional een- tertapped transformer, balances the voltage signal on driving electrodes in real time and suppresses the influence of power supply drift and temperature variation. The detecting circuit uses switched demodu- lation based on the double frequency of driving signal to extract the second harmonics and adopts closed loop detection to improve the linearity of system. The whole circuitry is realized with 0.5 p,m CMOS technology and its testing results show that this kind of miniature fluxgate magnetometer （the fluxgate with three tips and CMOS interface circuit） has a sensitivity of 30.8 p,V/nT and a linearity er- ror of 0.62%, in which the power supply is 10 V and the power consumption is 100 mW. The area of the chip is merely 15.54 mm2.

关 键 词：三端式磁通门 CMOS 闭环 反馈桥电路 

分 类 号：TN432[电子电信—微电子学与固体电子学]