基于FPGA的DLMS自适应回波抵消滤波器实现  

Implementation of an FPGA_Based DLMS Adaptive Filter for Echo Cancellation

作　　者：尹永超[1] 薛文玲[1] 李会雅[1] 

机构地区：[1]河北大学电子信息与工程学院,河北保定071002

出　　处：《河北软件职业技术学院学报》2013年第1期61-63,80,共4页Journal of Hebei Software Institute

基　　金：2012年保定市科学技术研究与发展指导计划"直放站回波抵消算法研究"(12ZG016);横向课题"移动通信(GSM和WCDMA)直放站关键技术研究"(2010-19)

摘　　要：传统的LMS算法结构不易于并行实现,而采用DLMS算法设计并行流水结构的自适应滤波器,使算法更适合在FPGA中的硬件实现。将DLMS自适应滤波器引入回波抵消设计中完成整体设计,并选取FPGA器件用硬件语言Ver-ilog HDL加以实现。通过仿真验证表明,该设计在抑制回波抵消方面具有良好的效果。Based on the analysis of traditional LMS algorithm structure is not easy to be implemented in parallel, The DLMS algorithm is used to design a parallel pipeline structure adaptive filter to make the algorithm more suitable for hardware implementation in an FPGA. The DLMS adaptive filter is introduced to the whole echo cancellation design, after that, the Verilog HDL language is used to accom plish the design on the appropriate FPGA devices. Finally, the simulation results show that the design has good results in the suppression of the echo.

关 键 词：自适应滤波器 回波抵消 DLMS FPGA 

分 类 号：TN919[电子电信—通信与信息系统]